1. Field of the Invention
The present invention relates to a programmable controller to be used with a special unit for complementing an insufficient computational speed of a microprocessor which performs input/output control, in particular, to an improvement of functions and handling ability of a special-purpose integrated circuit element to be mounted in the special unit.
2. Background of the Invention
There exists a programmable controller which includes a microprocessor to operate in response to an operating state of an input signal of an operation switch or various sensors and a sequential program stored in a program memory to perform the driving control of an electrical load such as various actuators or display devices. In the programmable controller, as a complementary functional unit for handling a high-speed pulse signal to be cyclically computed, which is faster than a computation cycle of the program memory, for example, a high-speed counter unit or a high-speed pulse output unit is additionally provided for use. Moreover, a special functional unit for variably setting a time constant of a filter or for generating a pulse-width modulation signal output to keep a delay in fetching an input signal with an input filter small to perform a high-speed input is also known.
For example, according to JP 2002-169602 A (FIG. 1 and Abstract) and JP 2002-222003 A (FIG. 1 and Abstract), a special functional unit which is adapted for general use by using a programmable logic device (PLD) or a gate array has been described. JP 2002-169602 A discloses a programmable controller which includes an external connector for connecting an external device, a joint connector for connecting a unit of the programmable controller, and an arithmetic processing unit which has functions of transmitting and receiving a signal to/from the external device connected through the external connector to perform a logical computation based on the signal received from the external device and of transmitting a signal according to the result of the computation to the unit of the programmable controller through the joint connector. The arithmetic processing unit is configured by a programmable logic device which allows a selection of a plurality of functions by rewriting a program. In this manner, the programmable controller, which allows a plurality of functions to be realized in a simple manner and intends to reduce the cost by commonly using the same circuit components, is provided.
JP 2002-222003 A discloses a programmable controller which includes an external connector, a joint connector, a gate array, and an expansion connector. A device to be controlled is connected to the joint connector. A CPU unit including a CPU for executing a sequential program is connected to the joint connector. The gate array includes a plurality of special functions incorporated therein. The special functions assist the CPU unit connected through the joint connector to enhance the functions thereof. The gate array also transmits/receives a signal through the external connector. The expansion connector connects an additional substrate for expanding the special functions incorporated in the gate array to further add special functions. The expansion connector includes a programmable logic device in which the special functions are incorporated, and an expansion-side connector connected to the programmable logic device and connecting to the expansion connector. In this manner, the programmable controller allows the addition of special functions to reduce the cost. According to the multi-functional special functional unit as described above, rewriting of a program allows a single general-purpose functional circuit to realize various functions such as an I/O function, an input time constant function, an interruption function, a counter function, a compare output function, a pulse output function, a PWM output function, and a positioning function.
On the other hand, JP 2002-006907 A (FIG. 3 and Abstract), the following I/O unit is disclosed. A programming function is provided for the I/O unit serving as a special functional unit to allow a user to freely program an I/O control logic and a computation function. As a result, the I/O unit can be customized (optimized) according to a user's application. In this case, the user inputs a program for the I/O control logic and the arithmetic processing to the I/O unit having special functions to create a user's original unit operation mode to allow the I/O unit to be customized to be optimal for an object to be controlled and a controlling method. Moreover, the I/O unit is configured to allow the attachment of an I/O board thereto. The I/O board includes a special input circuit to which a pulse input, an analog input, a special sensor input, and the like are input, and a special output circuit for outputting a pulse output, an analog output, and the like. The special I/O is controlled by the I/O unit.
Each of the programmable controllers according to JP 2002-169602 A, JP 2002-222003 A, and JP 2002-006907 A described above is used with the special functional unit including the programmable logic device, the combination of the gate array and the programmable logic device, or the microprocessor. The functions of the special functional unit can be programmably changed. As a result, the arithmetic unit which can be used for various special applications in the same manner as in the general-purpose use is provided.
From user's point of view, however, the programmable controllers as described above are required to learn different program languages respectively for a program for the programmable logic device and a program for the microprocessor in addition to a sequence language for creating a control program for the programmable controller. Therefore, the programmable controller is so difficult that only a specific professional engineer can handle, which makes the diffusion of the programmable controller difficult.
Moreover, the programmable controller has various applications. For example, the programmable controller is used when only one high-speed counter function is required, one high-speed pulse output is required, or multiple high-speed counter functions and multiple high-speed pulse outputs are simultaneously required. However, how to construct an efficient standardized I/O interface circuit for various applications as those described above has never been discussed.